The Secrets of PC Memory: Part 3

Overclocking and the Waveform

When users overclock their computer memory, they are literally compressing the size of the Data Eye and changing the waveform at multiple levels by running at a higher frequency and as a result, more data can be transmitted over a set period. However, this takes away pre-established safety margins.

It’s a “Dark Art” because overclockers cannot observe or visualise the multi-dimensional factors at play; instead, they are looking for signs in stability, the general “feel” of the system and good old trial and error as each factor can and will interact and influence countless others, settling a new wave equilibrium.

Generally, raising DRAM voltage allows for faster memory speed, “but that also depends on the architecture of the chip too” explains Brett Williams, Senior Marketing Manager in Computing at Micron Technology.

“If the voltage is designed to be regulated, then increasing the external voltage might not do anything for the chip because you have got a regulator on the chip that is keeping the core at a specific voltage. If the chip is unregulated, when you increase the external voltage, it goes right into the core and increasing the core voltage allows the part to operate faster.”

As enthusiasts, we often enjoy the power of having various DRAM tweaking configurations exposed in the motherboard BIOS. While they may be useful, average users at home do not have an intimate understanding of most functions in order to establish a basis to make effective performance improvements.

Like other cryptic BIOS configuration terminologies, the VREF, Clock Skew, Drive Strength values are more likely to be used by support engineers to test for motherboard stability against vast array of memory modules as they have access to other engineering equipment to make the job easier.

New users should be careful when adjusting these BIOS functions because while most functions are non-fatal when configured incorrectly, it is not the case with the voltage options. There is a stability stage known as “pseudo-stability” or “quasi-stability” – this is an area where the system is stable under some circumstances but not others, and perfect stability is impossible to attain because every BIOS change affects a multitude of others. It could simply be that there is no way to correct the waveform.


A single 24 hour successful memory stress tests does not guarantee the second test will be equally successful under exact system configuration. The fundamental reason why this “pseudo-stability” can creep up has to do with the diminishing signal margins. The gradual decrease in margins will increase the negative influence of Process, Voltage and Temperature (PVT) variations exponentially.

The truth of the matter is that many desktop systems that perform at DDR2 800MHz and beyond do generate errors. What we often regard as stable may not be perfectly flawless at 99.99 percent stability, while 0.01 percent of errors may not sound like much, the magnitude of data bits being transferred in a second can quickly snowball into a rather significant amount.

However, some errors may not be fatal to the system; for example, it may just cause pixels to change colour or forming an undetectable MP3 noise during movie playback.

This is one of the reason why servers and workstations utilise more expensive memory modules with Error Correction Codes (ECC) that often perform at slower speeds than their desktop counterparts. Brett Williams at Micron Technology believed that “there might need to be a change in the architecture [for the memory to keep up with CPU]. Whether it will be called DDR or something else, there will be a next generation DRAM after DDR3. Will it be revolutionary or evolutionary? That remains to be seen. In fact that is being worked out right now...”


Check back soon for Part Four, which investigates the most recent DDR3 technology.